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Architecture.def	1.7 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Architecture.h	1.75 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
ArchitectureSet.h	4.48 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
DylibReader.h	1.98 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
FileTypes.h	1.28 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
InterfaceFile.h	15.82 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
PackedVersion.h	2.3 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Platform.h	1.36 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Record.h	7.03 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
RecordVisitor.h	1.76 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
RecordsSlice.h	7.3 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Symbol.h	5.32 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
SymbolSet.h	6.05 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Target.h	2.52 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
TextAPIError.h	1.19 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
TextAPIReader.h	1.38 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
TextAPIWriter.h	1.67 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del
Utils.h	3.42 KB	-rw-r--r--	2025-01-14 09:41:02	Edit Del

Editing: Architecture.def (1.7 KB)

//===- llvm/TextAPI/Architecture.def - Architecture -----------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//

#ifndef ARCHINFO
#define ARCHINFO(arch)
#endif

///
/// X86 architectures sorted by cpu type and sub type id.
///
ARCHINFO(i386, MachO::CPU_TYPE_I386, MachO::CPU_SUBTYPE_I386_ALL, 32)
ARCHINFO(x86_64, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_ALL, 64)
ARCHINFO(x86_64h, MachO::CPU_TYPE_X86_64, MachO::CPU_SUBTYPE_X86_64_H, 64)


///
/// ARM architectures sorted by cpu sub type id.
///
ARCHINFO(armv4t, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V4T, 32)
ARCHINFO(armv6, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6, 32)
ARCHINFO(armv5, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V5TEJ, 32)
ARCHINFO(armv7, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7, 32)
ARCHINFO(armv7s, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7S, 32)
ARCHINFO(armv7k, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7K, 32)
ARCHINFO(armv6m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V6M, 32)
ARCHINFO(armv7m, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7M, 32)
ARCHINFO(armv7em, MachO::CPU_TYPE_ARM, MachO::CPU_SUBTYPE_ARM_V7EM, 32)


///
/// ARM64 architectures sorted by cpu sub type id.
///
ARCHINFO(arm64, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64_ALL, 64)
ARCHINFO(arm64e, MachO::CPU_TYPE_ARM64, MachO::CPU_SUBTYPE_ARM64E, 64)


///
/// ARM64_32 architectures sorted by cpu sub type id
///
ARCHINFO(arm64_32, MachO::CPU_TYPE_ARM64_32, MachO::CPU_SUBTYPE_ARM64_32_V8, 32)